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LID  (Light Induced Degradation)  is a loss of performances arising in the very first hours of exposition to the sun, with Crystalline modules. It may namely affect the real performance with respect to the final factory flash tests data delivered by some PV module providers.

It is unclear how it affects the performances with respect to the specified STC values. If the modules are sorted according to their final factory flash test for determining their Nominal Power class, the LID will indeed represent a loss with respect to STC.

The LID loss is related to the quality of the wafer manufacturing, and may be of the order of 1% to 3% (or even more).  

It is due to traces of Oxygen included in the molten Silicon during the Czochralski process. Under the light exposition effect, these positive-charged O2 dimers may diffuse across the silicon lattice, and create complexes with boron dopant acceptors. The boron-oxygen complexes create their own energy levels in the silicon lattice, and can capture electrons and holes which are lost for the PV effect.

NB: The LID effect only arises with conventional p-type boron-doped wafers. Unconventional technologies using n-type doped wafers (as for example SunPower mono-facial cells) are not affected.  

It is very difficult to obtain data about the LID effect on a given module sample. This is never referenced by the manufacturers of course. It depends on the origin of the Silicon wafers, and may vary from product to product, but also may depend on batches of a given production. As it is not sufficiently established, the LID loss is not proposed as default by PVsyst. If you specify it explicitly, the proposed default value is 2%.  

Please see the article in Photon 2008, and you can find some references about values reported by different authors in Thevenard (2010), p.20.