LID Loss

LID (Light Induced Degradation) is performance loss that occurs within the first hours of sun exposure in crystalline modules. It can affect actual performance relative to the final factory flash test data reported by some PV module manufacturers.

It is unclear how it affects the performances with respect to the specified STC values. If the modules are sorted according to their final factory flash test for determining their Nominal Power class, the LID will indeed represent a loss with respect to STC.

LID loss is related to wafer manufacturing quality and typically ranges from 1% to 3% (or more).

It results from traces of oxygen in molten silicon during the Czochralski process. Under light exposure, these positively charged O2 dimers can diffuse through the silicon lattice and form complexes with boron dopant acceptors. Boron-oxygen complexes create energy levels in the silicon lattice and can trap electrons and holes, reducing the PV effect.

NB: The LID effect occurs only with conventional p-type boron-doped wafers. Unconventional technologies using n-type doped wafers (such as SunPower mono-facial cells) are not affected.

It is very difficult to obtain LID data for a specific module sample. Manufacturers never report it, of course. It depends on the origin of silicon wafers and can vary between products and even between batches of a single production. Because it is not well-established, PVsyst does not propose LID loss as a default value. If you specify it explicitly, the suggested default is 2%.

Please see the article in Photon 2008¹, and you can find some references about values reported by different authors in Thevenard (2010)², p.20.